Raytheon Technologies Sr. Principal FPGA/ASIC Firmware Design Engineer in Dallas, Texas
The Electronic Warfare Department (EWS) department is seeking an experienced Sr. FPGA/ASIC Firmware Design Engineer to work with leading edge FPGA and ASIC designs.
This position is located in the Dallas/McKinney area.
The EWS center provides a fast paced and dynamic work environment with opportunity both skill and job advancement.
EWS is responsible for implementing digital designs for advanced Giga Hertz RF digital algorithms. Opportunities exist for advanced digital design and implementation of multi-channel filter banks, fft based demodulators, direct digital synthesis, MPSOC applications, high bandwidth interfaces (GigE, PCIe, and JSED), integration, and verification targeting the newest and highest density products from Xilinx and Altera.
Senior Principal Design Engineer are responsible for the architecture and implementation of EWS FPGA and ASIC designs.
These algorithms require the ability to take advantage of Xilinx/Altera specific architecture features in order to meet requirements in large footprint FPGA components.
The selected candidate will be required to develop simulation and lab functional testing in various software environments requiring familiarity with scripting and COTS test software. This candidate is expected to act as a mentor for less experienced FPGA engineers and provide their expertise to Program leadership to support productive program execution.
Bachelor’s degree with a minimum of 10+ years of professional experience or Master’s with 8+ years or PhD 6+ years
Experience in developing optimal FPGA architectures based on high level requirements
Experience with hardware/firmware/software integration and test using FPGAs and embedded processors
Proficiency with VHDL/Verilog for configuring FPGAs
Experience with FPGA and CPLD development tools from Xilinx, Altera, and MicroSemi
Proficiency with Questa/Modelsim for functional verification
Experience working in a system integration environment, verifying requirements and identifying and correcting defects
U.S. Citizenship status is required as this position will need a U.S. Security Clearance within 1 year of start date
U.S. Citizenship status is required as this position will require the ability to access US only data systems
Familiarity with digital receiver implementation
Familiarity with implementation of digital signal processing algorithms
Linux scripting experience
Familiarity with Lab testing tools such as LabView and Matlab
Experience incorporating third party IP into FPGA designs, including PCIe and high speed Ethernet
Familiarity with code coverage tools for evaluating test coverage
Six Sigma/process improvement experience
Required Education (including Major):
- Bachelors of Science degree in Electrical Engineering, or Computer Engineering
- Advanced degrees in related fields or technology a plus
This position requires either a U.S. Person or a Non-U.S. Person who is eligible to obtain any required Export Authorization.173809
Raytheon is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, age, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected Veteran status.
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